8-bit vertical CPU

[GeoNet]

Hi ORE community!

This is my first post since my application, so I wanted to show you what I have been busy with…

I have been long time horizontal CPU builder (not knowledgeable, but long time) and I wanted to post my progress on building my first vertical computer.

Specs (excuse me if I don’t use correct terminology):
Bitrate: 8-bit
Registers - 7 byte (ignore 0 register)
ROM: 256 Bytes (16 bit instruction word)
ALU: ADD, SUB, NOR, AND, XOR, NOT, Right Shift, Left Shift, Negate A
RAM: 64 bytes (in progress)
Additional operations: Jump, Branch, Call, Return, Mem Store, Mem Load
Graphics unit: upcoming

White color is ROM
Lime color is ALU
Yellow color is Registers
Brown color is Control Unit (my biggest confusion for a while and newest addition to my project since last one)

I have some questions: When I built my 1st complete CPU, I had a function of stack frame. Is this something that is worth implementing in this project when it comes to relatively simple CPU? What would be the pros on having stack frame?

Side note: Since beginning of my redstone adventures, I have had controversial relationship with delays, so I am building my stuff on Single Player and using mods like insta-wire to speed up buses.

What do you think of this project? I know it is not impressive on CHUNGUS2 level, but I am working my way up there (even though in my underground Single Player world)! Any suggestions?

[GeoNet]

Just thought that showing my instruction set would be helpful

[Lil_Ghost]

looks good so far. but how come you only have negate A on your alu, and not negate B? but if you can emulate all of the important logic gates then i guess it doesn’t matter.

[GeoNet]

I have the negate B function on my ALU, but decided not to go for it as it is a single operand instruction. So why have another one on my ISA, if I can just use Reg A for negating value and use it in next instruction. Negate B will be used for other instructions and is hidden in ALU decoder.