A while ago I posted Trial Questions I Ask which includes a list of questions you might see on one of my trials in the past. Since then, I’ve updated my questions to include what I feel are a better set. This means my old post is outdated and I’d like to provide a guide which can help future Builders.
Note: Currently, I only have questions prepared in advance for RCA ALUs, so other builds do not have a dedicated section on this post currently. I plan to later add CCA ALUs and Multipliers.
Knowledge Expectations
Here is an overview of the type of information you are expected to know during my trials. This doesn’t mean missing a single of these means you fail, just that I generally expect you to have this information covered pretty well.
Binary
I want to know that you understand how to use the Binary number system.
What to know:
- What Binary and Decimal are (Base 2 and Base 10 respectively)
- Converting between Binary and Decimal
- The LSB (Least Significant Bit) and MSB (Most Significant Bit)
- The range of values within a given number of bits (8 bits has a range of 0 to 255)
- Addition and subtraction in Binary
- Two’s Complement
- The range of values within a given number of bits using Two’s Complement (8 bits has a range of -128 to +127)
Logic Gates
What to know:
- What Logic Gates are
- The different gates (NOT, OR, NOR, AND, NAND, XOR, XNOR)
- How they each work
- How to build them
Adders
What to know:
- What a Half Adder is (A specific circuit composed of an XOR gate and an AND gate)
- What a Full Adder is (A combination of two Half Adders)
- How both work (their logic)
- The purpose of the Carry In and Carry Out
RCA ALU
This section applies if you are submitting an RCA ALU as your trial build.
It also assumes you are using the typical control lines (Invert A, Invert B, Carry In, Bitwise OR, Flood Carry), otherwise the required info will vary based on those.
What to know:
- The base circuit within an ALU is an adder (at least in redstone)
- How each control line works
- Input inverters are (usually) XOR gates
- Bitwise OR (usually) disables the middle torch(es) of the first XOR gates of the adder to prevent it from disabling the output when both inputs are on
- Flood Carry inverts the input by overriding the Carry Ins for every bit, using the second row of XORs of the adder similar to the input inverters
- How to use the ALU to perform all relevant operations
- How to debug broken blocks in the ALU (they will be broken without being shown to you)
Example Trial
Nothing could make me more clear on my trial expectations than literally pasting in questions you could get on the trial. This is quite literally the output of running my question generation program. Some details are randomized each time and it is all done in a way which, even without the program, would likely still be done by me manually. Some questions include answers and some do not, generally I put answers next to ones which change each time I run the program, but this isn’t always the case.
Since the questions vary each time I run the program, memorizing this exactly is not enough to pass my trial, since it is unlikely you will get this exact set of questions. As it stands currently, some of my questions have overlap with the ORE Binary Quiz that is required for applications. This is intentional, but may change in the future.
===[Binary]===
What is Binary?
What is the range of numbers you can write in 4 bits? (0 to 15)
What is the largest bit of a Binary number called? (MSB)
How do you convert from Decimal to Binary?
What is 7 in Binary? (0b111)
What is 0b1101 in Decimal? (13)
What is 0b1101 + 0b101? (0b10010)
What is 0b1100 - 0b1001? (0b11)
How do we represent negative numbers in Binary? (Two's Complement)
What range of numbers can you represent using Two's Complement in 4 bits? (-8 to +7)
What is -0b0110 using Two's Complement in 4 bits? (0b1010)
===[Logic Gates]===
What are logic gates?
How does an OR gate work?
How about a NOR gate?
What is 0 XNOR 1? (0)
What is 1 XOR 0? (1)
Show me how you'd build a NAND gate.
===[Adders]===
What is a Half Adder?
Show me how you'd build a Half Adder.
Show me 0b1 + 0b0 on the Half Adder. (1)
What is the Carry In of a Full Adder used for?
When is the carry torch of the 2nd Half Adder on? ((A XOR B) AND Cin)
===[RCA ALU]===
What is the base circuit in a typical ALU? (An Adder)
What is the primary gate used for the input inverters? (XOR or XNOR depending on how they built it)
Which control lines are used for subtraction on an ALU? (Invert A (or B) and Carry In)
Why does that result in subtraction?
How does the OR control line turn XOR gates into OR gates?
What operation does the Flood Carry control line do to the inputs? (Bitwise XNOR)
How does the Flood Carry control line invert the output of the adder's first XOR gates?
Is this similar to any other control line? (Invert A and B)
Show me 0b1100 OR 0b0101 on the ALU. (0b1101)
Now do 0b1011 NAND 0b0110. (0b1101)
I've broken 3 blocks, debug it and show me 0b0111 XNOR 0b1111. (0b0111)```