What’s a thing you have made which demonstrates sufficient engineering knowledge?:
A vector processing unit that can transform and translate a vector array ( a picture ) and also has a propper upscaler.
I also have more advanced linear algebra based image processors that do support rotation and 3 projection.
What engineering work went into designing this device?:
Working with a 5hz torchless pipeline, linear algebra, and a digital signal processing.
Image/s and/or video/s of the device:
So this device basically just moves a b/w image around?
What is a “proper upscaler”? What differentiates it von improper ones?
Please give more information about your build. Considering what you have posted so far, imo this is not up to similar quality as other engineer builds. But the main thing lacking here is your explanation, not necessarily your build. Thats left to be seen.
So no it doesn’t move bitmaps arround, it applies operations on a whole vector array, thus enableing it to apply linear transformations to that vector array.
In the pictures I linked it is a simple linear transform enabling scaling and translation.
Not linked in the original post are the higher order linear transforms that contain matrix multipliers.
Here is a higher order transform that contains a 2x2 matrix multiplier allowing image rotation, in addition to translation, transformation, squewing and symetries.
The upscaling is a post process that is ran on a rendered bitmap from the original vector array that has been pre-transformed.
It applies what is essentially some very low level anti-aliasing smoothing out the non-continous transformed bitmap to a upscaled version, hiding the missing data from the transform.
This part is actually applied on a bitmap through some digital signal processing.
I can see the build has potential but it would be nice to see it being used in a more general application like a game or other program, as opposed to only showing it perform on specifically chosen data.
Although I cannot speak on behalf of the staff, I would imagine if you can show it performing something visually amazing that couldn’t be achieved without it then it would easily be worthy of Engineer.
So the whole point of the build is to actually demonstrate the engineering, since I really haven’t seen any thing simmilar in the past, either with the actual linear algebra processing or the digital signal processing.
Since for me these engineering concepts have been built to fit into a larger project i haven’t bothered to make proper UI.
From what I understood the goal of the engineer application is to show the ability to engineer something new and that requires some knowledge not make a user friendly build.
If the concern is the abscense of a friendly UI I can make it.
I think the fact that it is doing real time anti-aliased upscaling should be enough to " demonstrates sufficient engineering knowledge" as nickster phrased it in the before you post section.
The description for engineer should probably be updated and made more specific as it’s currently extremely vague. Also, I don’t know why the staff themselves haven’t replied to this yet.
Engineer should require that you are able to clearly demonstrate that you can compete or exceed the feats that the current engineers have completed.
Your build does out compete current builds in some ways such as the anti-aliased scaling. But unless you have some sort of demonstrable product that utilises it, then it is hard to say that it is a strong contender for the engineer rank. User friendliness plays very little role in this as the final product is the most important component.
You have to bare in mind, that the current engineers have built CPUs capable of full 3D rendering and games - which themselves require fairly complex graphical capabilities, which aren’t that disimilar to your build here.
The bar for entry is extremely high and it will only continue to get higher as time passes and I wish you luck if you want to apply again in the future.
At a minimum, your description of the Engineering process is quite lacking. Generally this goes in depth into the various steps of creating the Engineering build in question rather than simply being a quick sentence (The part on “Engineering work”). As for whether the build itself is acceptable, I don’t feel the most qualified to judge that myself but it seems Mod covered it quite well. The bar is very high for Engineer builds and I’m not sure if this is quite there.
I’ll make it clearly demonstrable in that case.
What you have to keep in mind mod is that this is dedicated hardware not software,
I made the fully aware decision to not post a CPU since I feel that all the previous engineer posts are about cpu’s which is only a small part of computational redstone imo.
Even if people have built 3d renderers in cpu you have to keep in mind that the engineering work is completely different. The whole goal is to be near realtime therefore alot of dedicated hardware optimisations have to be made.
This runs many orders of magnitude faster than software integrations because of the core engineering differences.
I want to stretch it again what I build is not software and runs many orders of magnitude faster than a cpu software integration making it completely different, so not comparable to what people have implemented with software
My understanding was to give an overview description on why this is not like the other engineer’s work, I thought it would be enough for an initial overview, where the details would be seen in the actual interview, not a blog post, but if more details are required here we go.
All the engineering work done is to allow many optimisations like the fact that I have to build everything torchless to allow the 5hz pipeline, even if 5hz torchless doesn’t seem like a gain over 3.333hz at the cost of not using torches. As I demonstrated to mod yesterday it is the difference in running a 64x64 screen from 13min20s (800 seconds) to iterate individually and process all the pixels to about 20 min (1230 seconds) (I hope my math isn’t too off on that one)
Everything also has to be perfectly synced and done in a branchless approach of mind, since even if branching is doable without too much complexity it is error-prone and in some cases just not doable since it would add bubbles to the whole pipeline.
A lot of the approach in the process is done to avoid human error, which will always happen but working on a pipeline that involves multiple kilobits per second of throughput becomes very complicated to debug.
An example of that is the fact that I avoid working with repeaters above one tick since currently there is a bug in-game that destroys the data if a repeater ends a chain of repeaters at the latency corresponding to the frequency of the data passed through for example a two tick repeater followed by a one tick repeater is fine but a one tick repeater followed by a two tick one will corrupt the data, and finding those mistakes are not impossible but very hard and huge time waste.
The whole debugging process also has to be done properly since it’s very easy to miss synchronisation errors, for example, I swapped the timing by accident on a 5hz hex-> binary converter yesterday ( i did 3 ticks, 2 ticks, 1 tick instead of 1,2,3) which didn’t show at first since it is still in cadence with the 5hz clock. but because a lot of the processes are based on time dephasing to not only do space-wise operations on bits but also time-wise ( which is uncommon in CPU architecture ) the data gets corrupted, so a proper unit test has to be devised on a per component basis.
Another engineering difference with CPU design is the highly parallel approach leading to massive builds, for example, while building my passthrough display to render 12 lines in parallel, the scale has imposed two things:
Relying on rails to avoid block updates on a massive scale
But also which is much more uncommon, lag issues with the number of block faces rendered by the game, which isn’t typically seen as a problem, but I had to minimise those block faces by filling in as many holes in the display as possible, affecting the style of my wiring.
For the mathematical approach for the initial upsampling step. Depending on the set of operations that are required for the build, if the only interesting thing is a simple translation and upscale a simple linear combination is enough to approach the result.
Tho if more complex operations are required like rotation the approach has to be changed.
In the case of 2d operation, a 2x2 matrix multiplier has to be done, but this would now exclude translations, so the solution is either to have a 2x3 matrix or a 2x2 matrix follow and preceded by translation units. This matrix multiplier requires syncing on a very large scale with yet again approaches to reduce human error.
On a larger scale, the multiplier also needs some optimisations to minimise the time complexity but I won’t go into details now.
Once the data is processed through the matrix multiplier / linear transform it needs to be rasterized to a bitmap to then be reserialized to be able to get processed as a signal rather than an array of vectors, therefore losing coordinate data to gain relative position data, sadly we can’t have both…
This operation is pretty trivial but has some inconveniences due to the 5hz frequency requirements.
the decoders have to be fully synced and torchless over the full bitmap memory (essentially a display without the lamps).
Once the data has been converted to a bitmap it can now be serialised to multiple 5hz bitmap streams to then be processed as a signal.
I won’t quite go into the details of the upscaling algorithm right now but in short, it is a dilation erosion scheme using kernel convolutions over the data stream.
And to get back to what mod has said I insist on the fact that this is not comparable to software approaches, the challenges are different.
Keep in mind that this runs orders of magnitude faster than a software implementation.
Any turing complete cpu architecture with enough memory can run this as a software implementation, saying that it runs on a cpu with tick warping is completely besides the point.
And it also has all the engineering challenges linked to the speed requirements and the hardware implementation side of things.
Tick warping should not be ignored while comparing performance of systems.
It isn’t a fair compare. Since this was designed to be ran at vanilla minecraft speeds.
The technical challenge was to get it to run fast, not just getting it to run.
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