Engineer Application - tyiy123

Minecraft name:

What’s a thing you have made which demonstrates sufficient engineering knowledge? : 8bit CPU at 0.714Hz, implementing :

=16 instructions stored in PROM

=Complete 8bit ALU (6ticks) with all the logic gates in addition to two arithmetic operations and shifts, and 3 slots available for “needed functions” to be implemented later. They are all 3 operands, and includes:

  • ADD
  • SUB(A-B)
  • OR
  • AND
  • INC *((A + B) +1)
  • RST *((A + B) >> 1)
  • XOR
  • LST *((A + B) << 1)
  • DEC *((A + B) - 1)
  • NOR
  • XNOR *(NOT A)
  • NAND
  • SUB(B-A)
  • ???
  • ???
  • ???

=The ALU supports to set 5 flags into a flag register :

  • Underflow flag
  • Overflow flag
  • Carry OUT
  • Sign Bit
  • Zero flag

=7 8bit dual read registers (5ticks) and an 8bit external IO (A, B, OUT)
=Unconditional branching
=Conditional branching using flags or number comparisons after CMP instruction (all implemented) :

  • JU (UF)
  • JO (OF)
  • JC (COUT)
  • JS (SB)
  • JZ (ZF)
  • JE (A == B)
  • JG (A > B)
  • JGE (A >= B)
  • JL (A < B)
  • JLE (A <= B)
  • and all these possibly negated.

Every instruction may be performed by reading any registers (or external input), writing to any register (or external output) and writing all 5 flags. Registers are available directly for the next instruction (even for branching).

What engineering work went into designing this thing? :

At the beginning of the project, I wanted to create a Turing complete CPU all by myself in Minecraft. Thus, I made everything in this CPU, from the XNOR gates (maybe it resembles to someone else’s at this basic level), the binary full adder, the features of the ALU, the ALU itself, its CU for 16 functions, the registers, its CU for 7 of them in addition to external IO, all the buses, the 16 instructions PROM, the instruction decoder, the program counter (though inspired by someone else), the 9/5 clock, the branching on the PC, the flags register, reader and inverter, etc. Everything in fact.

Moreover, I really wanted to get the clock as fast as possible by synchronizing everything down to its minimum (6ticks ALU is superb). I had difficulty for writing to registers first, because it would not write on the rising edge of a pulse, only at the falling. Much work had gone in this for the data to be available directly at the next instruction.

On another hand, I wanted to support as much functions and conditions as possible within one instruction (and one cycle). That’s why all logic gates, most flags and all conditions are there, including negating them all.

I wrote two programs for it right now, however a lot more to come : Fibonacci and multiplication, linked with a 7 segments display made by myself (although the idea came from someone else).

Image(s) and/or video(s) of the device :

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Your CPU seems quite versatile with the extensive list of ALU functions and branch conditions. Despite this, why have only 16 instructions in PROM? That is quite a limited amount of program memory compared to all the other engineer CPUs so far meaning you might not be able to run very interesting programs on it.

Thank you for responding. Indeed, storing 16 instructions in PROM is very limited ; we just have to look at the multiplication program taking 9 lines to show that it is few. I did that to promote the fact that it implements a huge versatility of ALU functions and branching conditions at a 14 ticks clock.

Of course, what I planned next (and doing now) is a HUGE RAM standing not only for registers expansion, but also for storing instructions --with a new program memory.

More to come later on this.

Is it pipelined? Also, I spot some pistons. What are they used for?

imo You need to have at least 32 instructions, better 64.

Hi Trecar, you are the second to respond, thank you.

As you didn’t spot the word “pipeline”, it indicates it is not pipelined. I wanted to prove that non-pipelined may also be quite fast in comparison to some that I have observed so far.

The pistons you saw are most probably related to the 7 2x3 8bit dual read registers I made myself for the CPU ; it is only when someone write to them that the piston actually moves. Although the ICA of the ALU also uses pistons, I succeeded to synchronize everything to a 14 ticks clock speed.

Of course, a 16 instructions PROM is very small, and that is why I am currently working on a HUGE RAM. I will post further details here when parts of the project culminate.

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Your application is not sufficiently advanced to apply for this position and is therefore declined.

Simply put, the CPU you have made is missing the point of what “engineer” is. It’s a fantastic idea to invent all parts from scratch in the context of learning, but in the context of engineering, it’s very counter-intuitive. An engineer should adapt and improve concepts. That’s what goes into what we call “engineering work”. Also it’s missing implementations of some important concepts. We appreciate your initiative for simplicity, but the simplifications don’t seem to come with many advantages (compared to CPUs on ORE that implement the complexity). You say that it could be faster than a pipelined CPU, but we’d still like you to demonstrate that you know this concept and maybe show some comparisons.

We think you can do better, just like you say yourself! You should take more inspiration from your peers and apply the things you have learned to your own CPU. I hope you make a new application soon!

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